MP18021 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 1 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology description the MP18021 is a high frequency, 100v half bridge n-channel power mosfet driver. its low side and high side driver channels are independently controlled and matched with less than 5ns in time delay. under voltage lock-out on both high side and low side supplies force their outputs low in case of insufficient supply. the integrated bootstrap diode reduces external component count. features ? drives n-channel mosfet half bridge ? 100v v bst voltage range ? on-chip bootstrap diode ? typical 16ns propagation delay time ? less than 5ns gate drive matching ? drive 1nf load with 12ns/9ns rise/fall times with 12v vdd ? ttl compatible input ? less than 150 ? a quiescent current ? uvlo for both high side and low side ? in soic8 epad package applications ? telecom half bridge power supplies ? avionics dc-dc converters ? two-switch forward converters ? active clamp forward converters ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application MP18021 pwm controller inh vss inl drvl sw drvh vdd bst +12v 48v control drive lo drive hi isolation and feedback secondary side circuit
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 2 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. ordering information part number* package top marking free air temperature (t a ) MP18021hn soic8ep MP18021hn ?40 ? c to + 125 ? c * for tape & reel, add suffix ?z (e.g. MP18021hn?z); for rohs compliant packaging, add suffix ?lf; (e.g. MP18021hn?lf?z) package reference vdd bst drvh sw drvl vss inl inh 1 2 3 4 8 7 6 5 top view absolute maxi mum ratings (1) supply voltage (v dd ) .................... ?0.3v to +18v sw voltage (v sw ) ........................ ?5.0v to 100v bst voltage (v bst ) ....................... -0.3v to 100v bst to sw ................................... ?0.3v to +18v drvh to sw ................................ ?0.3v to +18v all other pins ...................... ?0.3v to (v dd +0.3v) continuous power dissipation (t a =+25c) (2) ............................................................. 2.6w junction temperature ............................... 150 ? c lead temperature .................................... 260 ? c storage temperature .............. ?65c to +150 ? c recommended operating conditions (3) supply voltage v dd ..................... +9.0v to 16.0v sw voltage (v sw ) .................. -1.0v to 100v-v dd sw slew rate ...................................... <50v/nsec operating junct. temp (t j ) ..... ?40 ? c to +140 ? c thermal resistance (4) ja jc soic8 (exposed pad) ............ 48 ...... 10 ... ? c/w notes: 1) exceeding these ratings may damage the device. 2) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max)=(t j (max)- t a )/ ja . exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 3) the device is not guaranteed to function outside of its operating conditions. 4) measured on jesd51-7, 4-layer pcb.
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 3 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics v dd = v bst -v sw =12v, v ss =v sw = 0v, no load at drvh and drvl, t a = +25 ? c, unless otherwise noted. parameter symbol condition min typ max units supply currents vdd quiescent current i ddq inl=inh=0 100 150 a vdd operating current i ddo fsw=500khz 2.8 3.5 ma floating driver quiescent current i bstq inl=inh=0 60 90 a floating driver operating current i bsto fsw=500khz 2.1 3 ma leakage current i lk bst=sw=100v 0.05 1 ? inputs inl/inh high 2 2.4 v inl/inh low 1 1.4 v inl/inh internal pull-down resistance r in 185 k ? under voltage protection vdd rising threshold v ddr 7.7 8.1 8.5 v vdd hysteresis v ddh 0.5 v (bst-sw) rising threshold v bstr 6.7 7.1 7.5 v (bst-sw) hysteresis v bsth 0.55 v bootstrap diode bootstrap diode vf @ 100ua v f1 0.5 v bootstrap diode vf @ 100ma v f2 0.9 v bootstrap diode dynamic r r d @ 100ma 2.5 ? low side gate driver low level output voltage v oll i o =100ma 0.15 0.22 v high level output voltage to rail v ohl i o =-100ma 0.45 0.6 v peak pull-up current i ohl v drvl =0v, v dd =12v 1.5 a v drvl =0v, v dd =16v 2.5 a peak pull-down current i oll v drvl =v dd =12v 2.5 a v drvl =v dd =16v 3.5 a floating gate driver low level output voltage v olh i o =100ma 0.15 0.22 v high level output voltage to rail v ohh i o =-100ma 0.45 0.6 v peak pull-up current i ohh v drvh =0v, v dd =12v 1.5 a v drvh =0v, v dd =16v 2.5 a peak pull-down current i olh v drvh =v dd =12v 2.5 a v drvh =v dd =16v 3.5 a
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 4 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. electrical characteristics (continued) v dd = v bst -v sw =12v, v ss =v sw = 0v, no load at drvh and drvl, t a = +25 ? c, unless otherwise noted. parameter symbol condition min typ max units switching spec. --- low side gate driver turn-off propagation delay inl falling to drvl falling t dlff 16 ns turn-on propagation delay inl rising to drvl rising t dlrr 16 drvl rise time c l =1nf 12 ns drvl fall time c l =1nf 9 ns switching spec. --- floating gate driver turn-off propagation delay inl falling to drvh falling t dhff 16 ns turn-on propagation delay inl rising to drvh rising t dhrr 16 ns drvh rise time c l =1nf 12 ns drvh fall time c l =1nf 9 ns switching spec. --- matching floating driver turn-off to low side drive turn-on t mon 1 5 ns low side driver turn-off to floating driver turn-on t moff 1 5 ns minimum input pulse width that changes the output t pw 50 (5) ns bootstrap diode turn-on or turn- off time t bs 10 (5) ns note: 5) guaranteed by design.
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 5 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. pin functions pin # name description 1 vdd supply input. this pin supplies power to all the internal circuitry. a decoupling capacitor to ground must be placed close to this pin to ensure stable and clean supply. 2 bst bootstrap. this is the positive power supply for the internal floating high-side mosfet driver. connect a bypass capacitor between this pin and sw pin. 3 drvh floating driver output. 4 sw switching node. 5 inh control signal input for the floating driver. 6 inl control signal input for the low side driver. 7 vss, exposed pad chip ground. connect to exposed pad to vss for proper thermal operation. 8 drvl low side driver output.
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 6 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performance characteristics v dd =12v, v ss =v sw = 0v, t a = +25 ? c, unless otherwise noted. i ddo operation current vs. frequency 0 1 2 3 4 5 6 0 200 400 600 800 1000 i ddo (ma) i bsto operation current vs. frequency 0 1 2 3 4 0 200 400 600 800 1000 i bsto (ma) high level output voltage vs.temperature 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 -50 0 50 100 150 v ohl ,v ohh (v) low level output voltage vs. temperature 0 0.05 0.1 0.15 0.2 0.25 0.3 -50 0 50 100 150 v oll ,v olh (v) undervoltage l ockout t hreshol d vs.temp erature v bstr ,v ddr (v) undervoltage lockout hysteresis vs.temperature 490 500 510 520 530 540 550 560 -50 0 50 100 150 v bsth ,v ddh (mv) t=-40 o c t=0 o c t=25 o c t=125 o c t=-40 o c t=0 o c t=25 o c t=125 o c v bst =v dd =9v v bst =v dd =12v v bst =v dd =14v v ddh v bsth v bst =v dd =9v v bst =v dd =12v v bst =v dd =14v propagation delay vs. temperature 13 14 15 16 17 18 19 20 -50 0 50 100 150 t dhrr ,t dlrr ,t dhff ,t dlff ( ns ) t dhrr t dlrr t dlff t dhff peak pull-up current vs. output voltage 0 0.5 1 1.5 2 024681012 024681012 v drvh ,v drvl (v) i ohh ,i ohl (a) peak pull-down current vs. output voltage v drvh ,v drvl (v) 0 0.5 1 1.5 2 2.5 3 i olh ,i oll (a) 6.5 7 7.5 8 8.5 -50 0 50 100 150 v bstr v ddr
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 7 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. typical performanc e characteristics (continued) v dd =12v, v ss =v sw = 0v, t a = +25 ? c, unless otherwise noted. bootst rap diode i- v characteristics 0.0001 0.001 0.01 0.1 1 0.5 0.6 0.7 0.8 0.9 1 forward voltage (v) forward current (a) quiescent current vs. voltage 40 60 80 100 120 140 5 7.5 10 12.5 15 17.5 20 v dd ,v bst (v) i ddq ,i bstq (ua) i ddq vs. v dd i bstq vs. v bst maximum v sw voltage vs. v dd voltage v dd to v ss voltage (v) v sw to v ss voltage (v) 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. 5v/div. 5v/div. 5v/div. 5v/div. 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. 10v/div. turn-on propagation delay gate drive matching t moff drive rise time (1nf load) turn-off propagation delay gate drive matching t mon drive fall time (1nf load) 0 20 40 60 80 100 12 13 14 15 16
MP18021 D 100v high frequency half-bridge gate driver MP18021 rev. 1.0 www.monolithicpower.com 8 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. block diagram under voltage vdd bst drvh drvl sw inh inl vss under voltage level shift driver driver figure 1?function block diagram input (inh, inl) output (drvh, drvl) t dhrr , t dlrr t dhff , t dlff input (inh, inl) output (drvh, drvl) t dhrr , t dlrr t dhff , t dlff inl inh drvl drvh t mon t moff figure 2?timing diagram
MP18021 D 100v high frequency half-bridge gate driver notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. MP18021 rev. 1.0 www.monolithicpower.com 9 8/8/2012 mps proprietary information. unaut horized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. package information soic8 (exposed pad) see detail "a" 0.0075(0.19) 0.0098(0.25) 0.050(1.27) bsc 0.013(0.33) 0.020(0.51) seating plane 0.000(0.00) 0.006(0.15) 0.051(1.30) 0.067(1.70) top view front view side view bottom view note: 1) control dimension is in inches. dimension in bracket is in millimeters. 2) package length does not include mold flash, protrusions or gate burrs. 3) package width does not include inte rlead flash or protrusions. 4) lead coplanarity (bottom of leads after forming) shall be 0.004" inches max. 5) drawing conforms to jedec ms-012, variation ba. 6) drawing is not to scale. 0.089(2.26) 0.101(2.56) 0.124(3.15) 0.136(3.45) recommended land pattern 0.213(5.40) 0.063(1.60) 0.050(1.27) 0.024(0.61) 0.103(2.62) 0.138(3.51) 0.150(3.80) 0.157(4.00) pin 1 id 0.189(4.80) 0.197(5.00) 0.228(5.80) 0.244(6.20) 14 85 0.016(0.41) 0.050(1.27) 0 o -8 o detail "a" 0.010(0.25) 0.020(0.50) x 45 o 0.010(0.25) bsc gauge plane
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